Senior ASIC Design Engineer

Company: Johns Hopkins Applied Physics Lab
Location: Laurel
Posted on: January 23, 2025

Job Description:

DescriptionAre you passionate about providing real impact to the country's toughest national security problems?Do you love building and prototyping robust electrical systems?If so, we're looking for someone like you to join our team at APL.The Miniature Device Technologies Group develops highly customized tools and techniques required to carry out missions around the globe. Whether it be a quick reaction need from the field or the long-term development of a novel capability, we work hand in hand with our government sponsors to conceive and realize solutions to their most challenging problems. We leverage our diverse set of capabilities in integrated circuit, printed circuit board (PCB), embedded software, field-programmable gate array (FPGA), and signal processing design to create ultra-small, low-power solutions that exceed comparable commercial alternatives.We are seeking a versatile senior electronics design engineer to help us advance the state-of-the-art in miniature sensor systems for a wide range of applications. In this role, you will focus heavily on the trades of size, weight, and power (SWaP) as you design systems for ultimate performance, whether it be for a handheld/body-worn or a high-bandwidth DSP or FPGA application. You will have the opportunity to work across the full design cycle, including tasks such as: concept development, schematic capture, circuit simulation, ASIC and FPGA design, PCB design, product mechanical integration, battery selection, environmental suitability, device fabrication, and device testing and final qualification. As a result, you will get to work with a multidisciplinary team of highly-talented electrical, software, mechanical, and materials engineers as you integrate your designs into the greater system. Some of the types of systems we develop include but are not limited to:

• RF communications
• Position, navigation, and timing (PNT)
• Microelectronics (including custom ASIC development and packaging)
• Sensor systems (audio, image, motion, etc.)
• High reliability systems for harsh environments/long operational lifetimesAs a Senior ASIC Design Engineer...
  • Your primary responsibility will be to develop capabilities for sponsor programs with custom hardware needs.
  • You will conceive, design, and evaluate solutions that may require knowledge of sensors, discrete analog/RF circuit design, power supply design, and interfacing with microcontrollers/FPGAs/custom ASICs.
  • You will pursue new technical concepts in order to improve the SWaP of existing solutions.
  • You will ensure device reliability through rigorous testing under real-world conditions.
  • You will additionally perform as a project manager for moderate sized tasks.QualificationsYou meet our minimum qualifications for the job if you...
    • Possess a Bachelors in engineering or a combination of equivalent level experience/education/certifications.
    • Have 6+ years of experience specifically designing and testing custom hardware to include RF ASIC technology, with at least 4 years of experience with RF and/or high-speed digital design.
    • Are skilled at using ASIC design tools such as Cadence.
    • Have a working knowledge of laboratory test equipment such as power supplies, oscilloscopes, multimeters, spectrum analyzers, waveform generators, and vector network analyzers.
    • Have experience managing projects on the order of $1M funding per year, or teams of 3 or more staff.
    • Have demonstrated experience mentoring junior staff.
    • Are willing and able to occasionally travel and work extended hours in support of technical tasks.
    • Are able to obtain a TS/SCI security clearance. If selected, you will be subject to a government security clearance investigation and must meet the requirements for access to classified information. Eligibility requirements include U.S. citizenship.You'll go above and beyond our minimum requirements if you...
      • Possess a MS or beyond in engineering, physics, or other related discipline.
      • Have extensive knowledge in ASIC technology such as material selection, etc.
      • Have some background in microelectronics integration such as chip-on-board, chip-scale packaging, chip depackaging, and wirebonding.
      • Have experience with 3D CAD tools suitable for concept mockups or component modeling.
      • Have software development skills suitable for developing automation tools, test interfaces, etc.
      • Are comfortable around rework tools such as a soldering iron, hot air pencil, or IR rework station.
      • Hold an active clearance and/or have successfully undergone single-scope background investigations in the past.Why work at APL?The Johns Hopkins University Applied Physics Laboratory (APL) brings world-class expertise to our nation's most critical defense, security, space and science challenges. While we are dedicated to solving complex challenges and pioneering new technologies, what makes us truly outstanding is our culture. We offer a vibrant, welcoming atmosphere where you can bring your authentic self to work, continue to grow, and build strong connections with inspiring teammates.At APL, we celebrate our differences and encourage creativity and bold, new ideas. Our employees enjoy generous benefits, including a robust education assistance program, unparalleled retirement contributions, and a healthy work/life balance. APL's campus is located in the Baltimore-Washington metro area. Learn more about our career opportunities at .#LI-AG1About UsAPL is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, creed, color, religion, sex, gender identity or expression, sexual orientation, national origin, age, physical or mental disability, genetic information, veteran status, occupation, marital or familial status, political opinion, personal appearance, or any other characteristic protected by applicable law.The referenced pay range is based on JHU APL's good faith belief at the time of posting. Actual compensation may vary based on factors such as geographic location, work experience, market conditions, education/training and skill level with consideration for internal parity. For salaried employees scheduled to work less than 40 hours per week, annual salary will be prorated based on the number of hours worked. APL may offer bonuses or other forms of compensation per internal policy and/or contractual designation. APL provides eligible staff with a comprehensive benefits package including retirement plans, paid time off, medical, dental, vision, life insurance, short-term disability, long-term disability, flexible spending accounts, education assistance, and training and development. Applications are accepted on a rolling basis.Minimum Rate$90,000 AnnuallyMaximum Rate$330,000 Annually
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Keywords: Johns Hopkins Applied Physics Lab, Towson , Senior ASIC Design Engineer, Engineering , Laurel, Maryland